Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 300  2010 Microchip Technology Inc.
REGISTER 21-1: CRCCON1: CRC CONTROL 1 REGISTER
R/W-0 U-0 R/W-0 R-0, HSC R-0, HSC R-0, HSC R-0, HSC R-0, HSC
CRCEN
— CSIDL VWORD4 VWORD3 VWORD2 VWORD1 VWORD0
bit 15 bit 8
R-0, HSC R-1, HSC R/W-0 R/W-0, HC R/W-0 U-0 U-0 U-0
CRCFUL CRCMPT CRCISEL CRCGO LENDIAN
— — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
HC = Hardware Cleared HSC = Hardware Settable/Clearable bit
bit 15 CRCEN: CRC Enable bit
1 = Enables module
0 = Disables module; all state machines, pointers and CRCWDAT/CRCDATH reset; other SFRs are
NOT reset
bit 14 Unimplemented: Read as ‘0’
bit 13 CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
bit 12-8 VWORD<4:0>: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN<4:0>  7 or
16 when PLEN<4:0>
7.
bit 7 CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
bit 6 CRCMPT: FIFO Empty bit
1 = FIFO is empty
0 = FIFO is not empty
bit 5 CRCISEL: CRC Interrupt Selection bit
1 = Interrupt on FIFO is empty; the final word of data is still shifting through the CRC
0 = Interrupt on shift is complete and results are ready
bit 4 CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = CRC serial shifter is turned off
bit 3 LENDIAN: Data Shift Direction Select bit
1 = Data word is shifted into the CRC, starting with the LSb (little endian)
0 = Data word is shifted into the CRC, starting with the MSb (big endian)
bit 2-0 Unimplemented: Read as ‘0’