Datasheet

 2010 Microchip Technology Inc. DS39969B-page 283
PIC24FJ256DA210 FAMILY
REGISTER 19-9: PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
— — — — — — RTSECSEL
(1)
PMPTTL
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-2 Unimplemented: Read as ‘0’
bit 1 RTSECSEL: RTCC Seconds Clock Output Select bit
(1)
1 = RTCC seconds clock is selected for the RTCC pin
0 = RTCC alarm pulse is selected for the RTCC pin
bit 0 PMPTTL: EPMP Module TTL Input Buffer Select bit
(2)
1 = EPMP module inputs (PMDx, PMCS1) use TTL input buffers
0 = EPMP module inputs use Schmitt Trigger input buffers
Note 1: To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit must also be set.
2: Unimplemented in 64-pin devices (PIC24FJXXXDAX06); maintain as ‘0’.