Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 26  2010 Microchip Technology Inc.
PMD0 — 93 A4 I/O ST/TTL
Parallel Master Port Data bits<15:0>.
PMD1 — 94 B4 I/O ST/TTL
PMD2 — 98 B3 I/O ST/TTL
PMD3 — 99 A2 I/O ST/TTL
PMD4 — 100 A1 I/O ST/TTL
PMD5 — 3 D3 I/O ST/TTL
PMD6 — 4 C1 I/O ST/TTL
PMD7 — 5 D2 I/O ST/TTL
PMD8 — 90 A5 I/O ST/TTL
PMD9 — 89 E6 I/O ST/TTL
PMD10 — 88 A6 I/O ST/TTL
PMD11 — 87 B6 I/O ST/TTL
PMD12 — 79 A9 I/O ST/TTL
PMD13 — 80 D8 I/O ST/TTL
PMD14 — 83 D7 I/O ST/TTL
PMD15 — 84 C7 I/O ST/TTL
PMRD — 82 B8 I/O ST/TTL Parallel Master Port Read Strobe.
PMWR — 81 C8 I/O ST/TTL Parallel Master Port Write Strobe.
RA0 — 17 G3 I/O ST
PORTA Digital I/O.
RA1 — 38 J6 I/O ST
RA2 — 58 H11 I/O ST
RA3 — 59 G10 I/O ST
RA4 — 60 G11 I/O ST
RA5 — 61 G9 I/O ST
RA6 — 91 C5 I/O ST
RA7 — 92 B5 I/O ST
RA9 — 28 L2 I/O ST
RA10 — 29 K3 I/O ST
RA14 — 66 E11 I/O ST
RA15 — 67 E8 I/O ST
TABLE 1-3: PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
64-Pin
TQFP/QFN
100-Pin
TQFP
121-Pin
BGA
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C™ = I
2
C/SMBus input buffer
Note 1: The alternate EPMP pins are selected when the ALTPMP
(CW3<12>) bit is programmed to ‘0’.
2: The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
3: The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
4: The alternate V
REF pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.