Datasheet

 2010 Microchip Technology Inc. DS39969B-page 253
PIC24FJ256DA210 FAMILY
18.6.2 HOST NEGOTIATION PROTOCOL
(HNP)
In USB OTG applications, a Dual Role Device (DRD) is
a device that is capable of being either a host or a
peripheral. Any OTG DRD must support Host
Negotiation Protocol (HNP).
HNP allows an OTG B-device to temporarily become
the USB host. The A-device must first enable the
B-device to follow HNP. Refer to the “On-The-Go
Supplement to the USB 2.0 Specification” for more
information regarding HNP. HNP may only be initiated
at full speed.
After being enabled for HNP by the A-device, the
B-device requests being the host any time that the USB
link is in suspend state, by simply indicating a discon-
nect. This can be done in software by clearing
DPPULUP and DMPULUP. When the A-device detects
the disconnect condition (via the URSTIF (U1IR<0>)
interrupt), the A-device may allow the B-device to take
over as host. The A-device does this by signaling con-
nect as a full-speed function. Software may accomplish
this by setting DPPULUP.
If the A-device responds instead with resume signaling,
the A-device remains as host. When the B-device
detects the connect condition (via ATTACHIF
(U1IR<6>), the B-device becomes host. The B-device
drives Reset signaling prior to using the bus.
When the B-device has finished in its role as host, it
stops all bus activity and turns on its D+ pull-up resistor
by setting DPPULUP. When the A-device detects a
suspend condition (Idle for 3 ms), the A-device turns off
its D+ pull-up. The A-device may also power-down the
V
BUS supply to end the session. When the A-device
detects the connect condition (via ATTACHIF), the
A-device resumes host operation and drives Reset
signaling.
18.6.3 EXTERNAL VBUS COMPARATORS
The external VBUS comparator option is enabled by set-
ting the UVCMPDIS bit (U1CNFG2<1>). This disables
the internal VBUS comparators, removing the need to
attach V
BUS to the microcontroller’s VBUS pin.
The external comparator interface uses either the
VCMPST1 and VCMPST2 pins, or the VBUSVLD,
SESSVLD and SESSEND pins, based upon the setting
of the UVCMPSEL bit (U1CNFG2<5>). These pins are
digital inputs and should be set in the following patterns
(see Table 18-3), based on the current level of the V
BUS
voltage.
TABLE 18-3: EXTERNAL VBUS COMPARATOR STATES
If UVCMPSEL = 0
V
CMPST1VCMPST2Bus Condition
00 V
BUS < VB_SESS_END
10 VB_SESS_END < V
BUS < VA_SESS_VLD
01 VA_SESS_VLD < VBUS < VA_VBUS_VLD
11 VBUS > VBUS_VLD
If UVCMPSEL = 1
V
BUSVLD SESSVLD SESSEND Bus Condition
00 1 V
BUS < VB_SESS_END
00 0 VB_SESS_END < V
BUS < VA_SESS_VLD
01 0 VA_SESS_VLD < V
BUS < VA_VBUS_VLD
11 0 V
BUS > VBUS_VLD