Datasheet

2010 Microchip Technology Inc. DS39969B-page 247
PIC24FJ256DA210 FAMILY
REGISTER 18-2: BDnSTAT: BUFFER DESCRIPTOR n STATUS REGISTER PROTOTYPE, CPU
MODE (BD0STAT THROUGH BD63STAT)
R/W-x R/W-x r-0 r-0 R/W-x R/W-x R/W-x, HSC R/W-x, HSC
UOWN DTS
(1)
Reserved Reserved DTSEN BSTALL BC9 BC8
bit 15 bit 8
R/W-x, HSC R/W-x, HSC R/W-x, HSC R/W-x, HSC R/W-x, HSC R/W-x, HSC R/W-x, HSC R/W-x, HSC
BC7 BC6 BC5 BC4 BC3 BC2 BC1 BC0
bit 7 bit 0
Legend: HSC = Hardware Settable/Clearable bit r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘r’ = Reserved bit x = Bit is unknown
bit 15 UOWN: USB Own bit
0 = The microcontroller core owns the BD and its corresponding buffer; the USB module ignores all
other fields in the BD
bit 14 DTS: Data Toggle Packet bit
(1)
1 = Data 1 packet
0 = Data 0 packet
bit 13-12 Reserved: Maintain as ‘0
bit 11 DTSEN: Data Toggle Synchronization Enable bit
1 = Data toggle synchronization is enabled; data packets with incorrect sync value will be ignored
0 = No data toggle synchronization is performed
bit 10 BSTALL: Buffer Stall Enable bit
1 = Buffer STALL enabled; STALL handshake issued if a token is received that would use the BD in
the given location (UOWN bit remains set, BD value is unchanged); corresponding EPSTALL bit
will get set on any STALL handshake
0 = Buffer STALL disabled
bit 9-0 BC<9:0>: Byte Count bits
This represents the number of bytes to be transmitted or the maximum number of bytes to be received
during a transfer. Upon completion, the byte count is updated by the USB module with the actual
number of bytes transmitted or received.
Note 1: This bit is ignored unless DTSEN = 1.