Datasheet

2010 Microchip Technology Inc. DS39969B-page 231
PIC24FJ256DA210 FAMILY
17.0 UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules available
in the PIC24F device family. The UART is a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as personal computers,
LIN/J2602, RS-232 and RS-485 interfaces. The module
also supports a hardware flow control option with the
UxCTS
and UxRTS pins, and also includes an IrDA
®
encoder and decoder.
The primary features of the UART module are:
Full-Duplex, 8 or 9-Bit data transmission through
the UxTX and UxRX pins
Even, Odd or No Parity options (for 8-bit data)
One or two Stop bits
Hardware Flow Control option with the UxCTS
and UxRTS
pins
Fully Integrated Baud Rate Generator with 16-Bit
Prescaler
Baud Rates Ranging from 15 bps to 1 Mbps at
16 MIPS
4-Deep, First-In-First-Out (FIFO) Transmit Data
Buffer
4-Deep FIFO Receive Data Buffer
Parity, Framing and Buffer Overrun Error Detection
Support for 9-bit mode with Address Detect
(9
th
bit = 1)
Transmit and Receive Interrupts
Loopback mode for Diagnostic Support
Support for Sync and Break Characters
Supports Automatic Baud Rate Detection
•IrDA
®
Encoder and Decoder Logic
16x Baud Clock Output for IrDA Support
A simplified block diagram of the UART is shown in
Figure 17-1. The UART module consists of these key
important hardware elements:
Baud Rate Generator
Asynchronous Transmitter
Asynchronous Receiver
FIGURE 17-1: UART SIMPLIFIED BLOCK DIAGRAM
Note: This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
Section 21. “UART” (DS39708). The
information in this data sheet supersedes
the information in the FRM.
UxRX
IrDA
®
Hardware Flow Control
UARTx Receiver
UARTx Transmitter
UxTX
UxCTS
UxRTS/BCLKx
Baud Rate Generator
Note: The UART inputs and outputs must all be assigned to available RPn/RPIn pins before use. See Section 10.4
“Peripheral Pin Select (PPS)” for more information.