Datasheet

 2010 Microchip Technology Inc. DS39969B-page 19
PIC24FJ256DA210 FAMILY
TABLE 1-2: DEVICE FEATURES FOR THE PIC24FJ256DA210 FAMILY: 100-PIN DEVICES
Features PIC24FJ128DA110 PIC24FJ256DA110 PIC24FJ128DA210 PIC24FJ256DA210
Operating Frequency DC – 32 MHz
Program Memory (bytes) 128K 256K 128K 256K
Program Memory (instructions) 44,032 87,552 44,032 87,552
Data Memory (bytes) 24K 96K
Interrupt Sources (soft vectors/NMI
traps)
66 (62/4)
I/O Ports Ports A, B, C, D, E, F, G
To ta l I / O P i n s 84
Remappable Pins 44 (32 I/O, 12 input only)
Timers:
Total Number (16-bit) 5
(1)
32-Bit (from paired 16-bit timers) 2
Input Capture Channels 9
(1)
Output Compare/PWM Channels 9
(1)
Input Change Notification Interrupt 84
Serial Communications:
UART 4
(1)
SPI (3-wire/4-wire) 3
(1)
I
2
C™ 3
Parallel Communications (EPMP/PSP) Yes
JTAG Boundary Scan Yes
10-Bit Analog-to-Digital Converter
(ADC) Module (input channels)
24
Analog Comparators 3
CTMU Interface Yes
USB OTG Yes
Graphics Controller Yes
Resets (and delays)
POR, BOR, RESET Instruction, MCLR, WDT; Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set 76 Base Instructions, Multiple Addressing Mode Variations
Packages 100-Pin TQFP and 121-Pin BGA
Note 1: Peripherals are accessible through remappable pins.