Datasheet

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
DS39997C-page 56 Preliminary © 2011-2012 Microchip Technology Inc.
For remapping operations, the 8-bit Program Space
Visibility register (PSVPAG) is used to define a
16K word page in the program space. When the MSb
of the EA is ‘1’, PSVPAG is concatenated with the lower
15 bits of the EA to form a 23-bit program space
address. Unlike table operations, this limits remapping
operations strictly to the user memory area.
Table 4-35 and Figure 4-7 show how the program EA is
created for table operations and remapping accesses
from the data EA.
TABLE 4-35: PROGRAM SPACE ADDRESS CONSTRUCTION
FIGURE 4-7: DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
Access Type
Access
Space
Program Space Address
<23> <22:16> <15> <14:1> <0>
Instruction Access
(Code Execution)
User 0 PC<22:1> 0
0xx xxxx xxxx xxxx xxxx xxx0
TBLRD/TBLWT
(Byte/Word Read/Write)
User TBLPAG<7:0> Data EA<15:0>
0xxx xxxx xxxx xxxx xxxx xxxx
Configuration TBLPAG<7:0> Data EA<15:0>
1xxx xxxx xxxx xxxx xxxx xxxx
Program Space Visibility
(Block Remap/Read)
User 0 PSVPAG<7:0> Data EA<14:0>
(1)
0 xxxx xxxx xxx xxxx xxxx xxxx
Note 1: Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
0Program Counter
23 bits
1
PSVPAG
8 bits
EA
15 bits
Program Counter
(1)
Select
TBLPAG
8 bits
EA
16 bits
Byte Select
0
0
1/0
User/Configuration Space Select
Table Operations
(2)
Program Space Visibility
(1)
24 bits
23 bits
(Remapping)
1/0
0
Note 1: The Least Significant bit of program space addresses is always fixed as ‘0’ to maintain word alignment
of data in the program and data spaces.
2: Table operations are not required to be word aligned. Table read operations are permitted in the
Configuration memory space.