Datasheet
© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 3
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
Pin Diagrams
PIC24FJ16MC101
MCLR
VSS
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
V
DD
VSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
F
LTA1
(2)
/SCK1/INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/T1CK/CN0/RA4
PGED3/SOSCI/RP4
(1)
/CN1/RB4
PWM1H2/RP12
(1)
/CN14/RB12
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
SDA1/SDI1/PWM1L3/RP9
(1)
/CN21/RB9
SCL1/SDO1/PWM1H3/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L2/RP13
(1)
/CN13/RB13
20-Pin PDIP/SOIC/SSOP
Note 1: The RPn pins can be used by any remappable peripheral. See Ta ble 1 for the list of available
peripherals.
2: The PWM Fault pins are enabled and asserted during any reset event. Refer to Section 15.2
“PWM Faults” for more information on the PWM faults.
= Pins are up to 5V tolerant
PIC24FJ32MC101
MCLR
VSS
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
V
DD
VSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
FLTA1
(2)
/INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
PWM1H2/RP12
(1)
/CN14/RB12
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
SDA1/PWM1L3/RP9
(1)
/CN21/RB9
SCL1/PWM1H3/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L2/RP13
(1)
/CN13/RB13