Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SSOP 28 16-Bit 16 null I/O number 21

161

162

163

164

165

166

167

168

169

170

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104

(1,2,3,4,5)

U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

— — FAOV3H FAOV3L FAOV2H FAOV2L FAOV1H FAOV1L

bit 15 bit 8

R/W-0 U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1

FLTAM

— — — — FAEN3 FAEN2 FAEN1

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 15-14 Unimplemented: Read as ‘0’

bit 13-8 FAOVxH<3:1>:FAOVxL<3:1>: Fault Input A PWM Override Value bits

1 = The PWM output pin is driven active on an external Fault input event

0 = The PWM output pin is driven inactive on an external Fault input event

bit 7 FLTAM: Fault A Mode bit

1 = The Fault A input pin functions in the Cycle-by-Cycle mode

0 = The Fault A input pin latches all control pins to the programmed states in PxFLTACON<13:8>

bit 6-3 Unimplemented: Read as ‘0’

bit 2 FAEN3: Fault Input A Enable bit

1 = PWMxH3/PWMxL3 pin pair is controlled by Fault Input A

0 = PWMxH3/PWMxL3 pin pair is not controlled by Fault Input A

bit 1 FAEN2: Fault Input A Enable bit

1 = PWMxH2/PWMxL2 pin pair is controlled by Fault Input A

0 = PWMxH2/PWMxL2 pin pair is not controlled by Fault Input A

bit 0 FAEN1: Fault Input A Enable bit

1 = PWMxH1/PWMxL1 pin pair is controlled by Fault Input A

0 = PWMxH1/PWMxL1 pin pair is not controlled by Fault Input A

Note 1: On PIC24FJ16MC101 (20-pin) devices, the FLTA1 pin is supported, but requires an external pull-down

resistor for correct functionality.

2: On PIC24FJ16MC102 (28-pin) devices, the FLTA1

and FLTB1 pins are supported and do not require an

external pull-down resistor.

3: The PxFLTACON register is a write-protected register. Refer to Section 15.3 “Write-protected

Registers” for more information on the unlock sequence.

4: Comparator outputs are not internally connected to the PWM Fault control logic. If using the Comparator

modules for Fault generation, the user must externally connect the desired comparator output pin to the

dedicated FLTA1

or FLTB1 input pin.

5: During any reset event, the FLTA1

pin is enabled by default and must be cleared as described in

Section 15.2 “PWM Faults”.