Datasheet

© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 155
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
15.0 MOTOR CONTROL PWM
MODULE
The PIC24FJ16MC101/102 and PIC24FJ32MC101/
102/104 devices have a 6-channel Pulse-Width
Modulation (PWM) module.
The PWM module has the following features:
Up to 16-bit resolution
On-the-fly PWM frequency changes
Edge-Aligned and Center-Aligned Output modes
Single Pulse Generation mode
Interrupt support for asymmetrical updates in
Center-Aligned mode
Output override control for Electrically
Commutative Motor (ECM) operation or BLDC
Special Event comparator for scheduling other
peripheral events
Fault pins to optionally drive each of the PWM
output pins to a defined state
Duty cycle updates configurable to be immediate
or synchronized to the PWM time base
15.1 PWM1: 6-Channel PWM Module
This module simplifies the task of generating multiple
synchronized PWM outputs. The following power and
motion control applications are supported by the PWM
module:
3-Phase AC Induction Motor
Switched Reluctance (SR) Motor
Brushless DC (BLDC) Motor
Uninterruptible Power Supply (UPS)
This module contains three duty cycle generators,
numbered 1 through 3. The module has six PWM
output pins, numbered PWM1H1/PWM1L1 through
PWM1H3/PWM1L3. The six I/O pins are grouped into
high/low numbered pairs, denoted by the suffix H or L,
respectively. For complementary loads, the low PWM
pins are always the complement of the corresponding
high I/O pin.
Note 1: This data sheet summarizes the features
of the PIC24FJ16MC101/102 and
PIC24FJ32MC101/102/104 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 47. “Motor Con-
trol PWM” (DS39735), in the “PIC24F
Family Reference Manual”, which is
available on the Microchip web site
(www.microchip.com).
2: It is important to note that the
specifications in Section 26.0 “Electri-
cal Characteristics” of this data sheet,
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
3: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.