Datasheet

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
DS39997C-page 146 Preliminary © 2011-2012 Microchip Technology Inc.
REGISTER 12-3: T4CON CONTROL REGISTER
R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0
TON
—TSIDL— — — — —
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 U-0
— TGATE TCKPS<1:0> T32 —TCS—
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 TON: Timer4 On bit
When T32 =
1:
1 = Starts 32-bit Timer4/5
0 = Stops 32-bit Timer4/5
When T32 =
0:
1 = Starts 16-bit Timer4
0 = Stops 16-bit Timer4
bit 14 Unimplemented: Read as ‘0’
bit 13 TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
bit 12-7 Unimplemented: Read as ‘0’
bit 6 TGATE: Timer4 Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS =
0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
bit 5-4 TCKPS<1:0>: Timer4 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
bit 3 T32: 32-bit Timer Mode Select bit
1 = Timer4 and Timer5 form a single 32-bit timer
0 = Timer4 and Timer5 act as two 16-bit timers
bit 2 Unimplemented: Read as ‘0’
bit 1 TCS: Timer4 Clock Source Select bit
1 = External clock from pin T4CK (on the rising edge)
0 = Internal clock (F
CY)
bit 0 Unimplemented: Read as ‘0’
Note: This register is available in PIC24FJ32MC101/102/104 devices only.