Datasheet

PIC24FJ64GA004 FAMILY
DS39881E-page 270  2010-2013 Microchip Technology Inc.
DC Characteristics
Comparator Specifications........................................ 243
Comparator Voltage Reference
Specifications.................................................... 243
I/O Pin Input Specifications....................................... 240
I/O Pin Output Specifications .................................... 242
Idle Current (I
IDLE) .................................................... 236
Internal Voltage Regulator Specifications ................. 243
Operating Current (I
DD).............................................235
Power-Down Current (I
PD) ........................................ 238
Program Memory Specifications ............................... 242
Temperature and Voltage Specifications .................. 234
Details on Individual Family Members .................................. 8
Development Support ....................................................... 219
Device Features (Summary) ................................................. 9
DISVREG Pin.................................................................... 215
Doze Mode........................................................................104
E
Electrical Characteristics
Absolute Maximum Ratings ...................................... 231
Capacitive Loading Requirements on
Output Pins ....................................................... 244
Thermal Operating Conditions .................................. 233
Thermal Packaging ................................................... 233
V/F Graphs (Extended Temperature) ....................... 232
V/F Graphs (Industrial Temperature) ........................ 232
Equations
A/D Conversion Clock Period ...................................200
Baud Rate Reload Calculation.................................. 153
Calculating the PWM Period ..................................... 136
Calculation for Maximum PWM Resolution............... 136
CRC Polynomial........................................................ 189
Device and SPIx Clock Speed Relationship ............. 150
UARTx Baud Rate with BRGH = 0............................160
UARTx Baud Rate with BRGH = 1............................160
Errata .................................................................................... 6
External Oscillator Pins .......................................................21
F
Flash Configuration Words.......................................... 30, 209
Flash Program Memory
and Table Instructions................................................. 47
Enhanced ICSP Operation.......................................... 48
Operations .................................................................. 48
Programming Algorithm .............................................. 50
RTSP Operation.......................................................... 48
Single-Word Programming..........................................52
G
Getting Started Guidelines ..................................................17
I
I/O Ports
Analog Port Pins Configuration.................................106
Input Change Notification.......................................... 106
Open-Drain Configuration ......................................... 106
Parallel (PIO) ............................................................ 105
Peripheral Pin Select ................................................ 107
Pull-ups ..................................................................... 106
I
2
C
Baud Rate Setting When Operating as
Bus Master ....................................................... 153
Clock Rates .............................................................. 153
Master in a Single Master Environment
Communication................................................. 151
Peripheral Remapping Options................................. 151
Reserved Addresses ................................................ 153
Slave Address Masking ............................................ 153
ICSP Operations
Analog and Digital Pins Configuration ........................ 22
ICSP Pins ........................................................................... 20
Idle Mode .......................................................................... 104
In-Circuit Debugger........................................................... 218
In-Circuit Serial Programming (ICSP)............................... 218
Instruction Set
Opcode Symbol Descriptions ................................... 224
Overview................................................................... 225
Summary .................................................................. 223
Inter-Integrated Circuit. See I
2
C.
Internet Address ............................................................... 273
Interrupts
Alternate Interrupt Vector Table (AIVT) ...................... 59
and Reset Sequence .................................................. 59
Implemented Vectors.................................................. 61
Interrupt Vector Table (IVT)........................................ 59
Registers .................................................................... 62
Setup and Service Procedures ................................... 94
Trap Vectors ............................................................... 60
Vector Table ............................................................... 60
J
JTAG Interface.................................................................. 218
M
Master Clear Pin (MCLR) ................................................... 18
Microchip Internet Web Site.............................................. 273
MPLAB ASM30 Assembler, Linker, Librarian ................... 220
MPLAB Integrated Development
Environment Software .............................................. 219
MPLAB PM3 Device Programmer .................................... 221
MPLAB REAL ICE In-Circuit Emulator System ................ 221
MPLINK Object Linker/MPLIB Object Librarian ................ 220
N
Near Data Space ................................................................ 32
O
Oscillator Configuration
Clock Switching ........................................................ 100
Sequence ......................................................... 101
CPU Clocking Scheme ............................................... 96
Initial Configuration on POR ....................................... 96
Oscillator Modes......................................................... 96
Output Compare
Continuous Output Pulse Generation Setup............. 135
PWM Mode............................................................... 136
Period and Duty Cycle Calculation................... 137
Single Output Pulse Generation Setup..................... 135