Datasheet

 2010-2013 Microchip Technology Inc. DS39881E-page 159
PIC24FJ64GA004 FAMILY
17.0 UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules available
in the PIC24F device family. The UART is a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as personal computers,
LIN/J2602, RS-232 and RS-485 interfaces. The module
also supports a hardware flow control option with the
UxCTS
and UxRTS pins, and also includes an IrDA
®
encoder and decoder.
The primary features of the UART module are:
• Full-Duplex, 8 or 9-Bit Data Transmission through
the UxTX and UxRX Pins
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS and
UxRTS
Pins
• Fully Integrated Baud Rate Generator with 16-Bit
Prescaler
• Baud Rates Ranging from 1 Mbps to 15 bps at
16 MIPS
• 4-Deep, First-In-First-Out (FIFO) Transmit Data
Buffer
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
(9th bit = 1)
• Transmit and Receive Interrupts
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA Encoder and Decoder Logic
• 16x Baud Clock Output for IrDA Support
A simplified block diagram of the UART is shown in
Figure 17-1. The UART module consists of these key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
FIGURE 17-1: UARTx SIMPLIFIED BLOCK DIAGRAM
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“UART” (DS39708).
Note: In this section, the UART modules are
referred to together as UARTx or
separately as UART1 and UART2.
UxRX
IrDA
®
Hardware Flow Control
UARTx Receiver
UARTx Transmitter
UxTX
UxCTS
UxRTS
BCLKx
Baud Rate Generator
Note: This peripheral’s inputs and outputs must be assigned to an available RPn pin before use. Please
see Section 10.4 “Peripheral Pin Select (PPS)” for more information.