Information

 2009-2013 Microchip Technology Inc. DS80000470H-page 21
PIC24FJ64GA004 FAMILY
APPENDIX A: DOCUMENT
REVISION HISTORY
Rev A Document (5/2009)
Initial release of this document; issued for Silicon
Revision B5. Incorporates the following current and
historical silicon issues from Revision A3 and B4:
•1 (JTAG)
• 2 (Low-Voltage Detect)
• 3-6 (Core)
• 7-9 (A/D)
•10 (I
2
C – I2C1 and SDA Line State)
• 11-16 (UART)
• 17 (Output Compare)
• 18-20 (SPI)
• 21-22 (I/O Ports)
•23 (JTAG)
• 24 (RTCC)
• 25-26 (I
2
C)
•27 (UART)
• 28 (I/O – Peripheral Pin Select)
• 29 (UART – UERIF Interrupt)
• 30 (UART – FIFO Error Flags)
• 31 (Core – BOR)
• 32 (Core – Instruction Set)
• 33 (Memory – Program Space Visibility)
• 34 (RTCC)
• 35 (SPI – Master Mode)
•36 (I
2
C – Master Mode)
•37 (I
2
C – Slave Mode)
•38 (I
2
C)
•39 (UART)
• 40 (Oscillator – SOSC)
• 41 (Voltage Regulator)
• 42 (Core – Code Protection)
• 43 (SPI)
• 44 (Core)
For data sheet clarifications:
Includes Data Sheet Clarifications 1 (Electrical
Characteristics), 2 (10-Bit High-Speed A/D Converter),
3 (I/O Ports), 4 (Oscillator Configuration), 5-6 (Special
Features) and 7-9 (Electrical Characteristics).
This document replaces these errata documents:
• “PIC24FJ64GA004 Family Revision A3 Silicon
Errata” (DS80316)
• “PIC24FJ64GA004 Family Revision B4 Silicon
Errata” (DS80384)
• “PIC24FJ64GA004 Family Data Sheet Errata”
(DS80333)
Rev B Document (7/2009)
Amended existing Silicon Revision A3 as joint
Revision A3/A4.
Added silicon issue 45 (UART) to Silicon Revision A3/A4.
Added Silicon Revision B5; includes existing issues
16 (UART), 29 (UART – UERIF Interrupt), 30 (UART –
FIFO Error Flags), 30 (Core), 33 (Memory – Program
Space Visibility), 34 (RTCC), 36 (I
2
C – Master Mode),
37 (I
2
C – Slave Mode), 39 (UART), 43 (SPI) and
44 (Core). No new silicon issues added for this
revision.
Revised issue 25 (I
2
C) with additional information, differ-
entiating erroneous bit behavior from misinterpretation
of the bit state.
Added data sheet clarification 10 (I
2
C).
Rev C Document (2/2010)
Removed existing issue 44 (Core) entirely; issue 45
(UART – IrDA) is now renumbered as issue 44.
Added new issues 45 (Core), 46 and 47 (SPI – Master
Mode), 48 (SPI – Framed SPI Modes), 49 (Core – Data
SRAM) and 50 (I/O – PORTA and PORTB) to various
existing silicon revisions.
Added Silicon Revision B8; includes newly added and
existing issues 16 (UART), 29 (UART – UERIF Inter-
rupt), 30 (UART – FIFO Error Flags), 31 (Core – BOR),
33 (Memory – Program Space Visibility), 34 (RTCC),
36 (I
2
C – Master Mode), 37 (I
2
C – Slave Mode),
39 (UART), 43 (SPI), 45 (Core), 46 through 47 (SPI –
Master Mode), 48 (SPI – Framed SPI Modes) and
50 (I/O – PORTA and PORTB).
Removed all data sheet clarifications as they are
addressed in the new revision of the data sheet.
Amended revision history to include the addition of
Silicon Revision B5 to this document.
Rev D Document (3/2010)
Updated silicon issue 50 (I/O – PORTA and PORTB) by
removing PORTB issues not relevant to this device
family.
Added data sheet clarification 1 (Electrical Specifica-
tions – DC Characteristics) to Revision D of the data
sheet.
Rev E Document (9/2010)
Added silicon issue 51 (A/D Converter), added data
sheet clarification issues 1 (Guidelines For Getting
Started with 16-Bit Microcontrollers) and
2 (Electrical
Characteristics
). Removed Table 27-10 because
Table 27-3, a newer version, has been added.