Information

PIC24FJ256GA110 FAMILY

TABLE 3-5: INTERRUPT CONTROLLER REGISTER MAP (PARTIAL REPRESENTATION)

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

INTCON1 0080 NSTDIS

— — — — — — — — — — MATHERR ADDRERR STKERR OSCFAIL — 0000

INTCON2 0082 ALTIVT DISI

— — — — — — — — — INT4EP INT3EP INT2EP INT1EP INT0EP 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 3-18: PORTG REGISTER MAP

File

Name

Addr Bit 15

(1)

Bit 14

(1)

Bit 13

(1)

Bit 12

(1)

Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

(2)

Bit 0

(2)

All

Resets

TRISG 02F0 TRISG15 TRISG14 TRISG13 TRISG12

— — TRISG9 TRISG8 TRISG7 TRISG6 — — TRISG3 TRISG2 TRISG1 TRISG0 F3CF

PORTG 02F2 RG15 RG14 RG13 RG12

— — RG9 RG8 RG7 RG6 — — RG3 RG2 RG1 RG0 xxxx

LATG 02F4LATG15LATG14LATG13LATG12

— —LATG9LATG8LATG7LATG6— —LATG3LATG2LATG1LATG0xxxx

ODCG 02F6 ODG15 ODG14 ODG13 ODG12

— — ODG9 ODG8 ODG7 ODG6 — — ODG3 ODG2 ODG1 ODG0 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.

Note 1: Bits unimplemented in 64-pin and 80-pin devices; read as ‘0’.

2: Bits unimplemented in 64-pin devices; read as ‘0’.