Datasheet

PIC24FJ128GA010 FAMILY
DS39747F-page 78  2005-2012 Microchip Technology Inc.
REGISTER 7-13: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
U-0 R/W-0 U-0 U-0 U-0 U-0 U-0 U-0
—RTCIE— — — — — —
bit 15 bit 8
U-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0 U-0
— INT4IE INT3IE — — MI2C2IE SI2C2IE —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14 RTCIE: Real-Time Clock/Calendar Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 13-7 Unimplemented: Read as ‘0’
bit 6 INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 5 INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 4-3 Unimplemented: Read as ‘0’
bit 2 MI2C2IE: Master I2C2 Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 1 SI2C2IE: Slave I2C2 Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 0 Unimplemented: Read as ‘0’