Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 100 (14x14) 16-Bit 16 MHz I/O number 84

PIC24FJ128GA010 FAMILY

DS39747F-page 44  2005-2012 Microchip Technology Inc.

TABLE 4-24: PARALLEL MASTER/SLAVE PORT REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

PMCON 0600 PMPEN

— PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN CSF1 CSF0 ALP CS2P CS1P BEP WRSP RDSP 0000

PMMODE 0602 BUSY IRQM1 IRQM0 INCM1 INCM0 MODE16 MODE1 MODE0 WAITB1 WAITB0 WAITM3 WAITM2 WAITM1 WAITM0 WAITE1 WAITE0 0000

PMADDR

(1)

0604

CS2 CS1 Parallel Port Destination Address<13:0> (Master modes) 0000

PMDOUT1

(1)

Parallel Port Data Out Register 1 (Buffers 0 and 1) 0000

PMDOUT2 0606 Parallel Port Data Out Register 2 (Buffers 2 and 3) 0000

PMDIN1 0608 Parallel Port Data In Register 1 (Buffers 0 and 1) 0000

PMDIN2 060A Parallel Port Data In Register 2 (Buffers 2 and 3) 0000

PMAEN 060C PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0 0000

PMSTAT 060E IBF IBOV

— — IB3F IB2F IB1F IB0F OBE OBUF — — OB3E OB2E OB1E OB0E 008F

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: PMADDR and PMDOUT1 share the same physical register. The register functions as PMDOUT1 only in Slave modes and as PMADDR only in Master modes.

TABLE 4-25: REAL-TIME CLOCK AND CALENDAR REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

ALRMVAL 0620 Alarm Value Register Window Based on ALRMPTR<1:0> xxxx

ALCFGRPT 0622 ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 ARPT7 ARPT6 ARPT5 ARPT4 ARPT3 ARPT2 ARPT1 ARPT0 0000

RTCVAL 0624 RTCC Value Register Window Based on RTCPTR<1:0> xxxx

RCFGCAL

(1)

0626 RTCEN — RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 0000

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: RCFGCAL register Reset value is dependent on the type of Reset.

TABLE 4-26: DUAL COMPARATOR REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

CMCON 0630 CMIDL

— C2EVT C1EVT C2EN C1EN C2OUTEN C1OUTEN C2OUT C1OUT C2INV C1INV C2NEG C2POS C1NEG C1POS 0000

CVRCON 0632

— — — — — — — — CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.