Datasheet

2005-2012 Microchip Technology Inc. DS39747F-page 37
PIC24FJ128GA010 FAMILY
TABLE 4-5: ICN REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
CNEN1 0060 CN15IE CN14IE CN13IE CN12IE CN11IE CN10IE CN9IE CN8IE CN7IE CN6IE CN5IE CN4IE CN3IE CN2IE CN1IE CN0IE 0000
CNEN2 0062
—CN21IE
(1)
CN20IE
(1)
CN19IE
(1)
CN18IE CN17IE CN16IE 0000
CNPU1 0068 CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE CN9PUE CN8PUE CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE 0000
CNPU2 006A
CN21PUE
(1)
CN20PUE
(1)
CN19PUE
(1)
CN18PUE CN17PUE CN16PUE 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal
Note 1: Implemented in 80-pin and 100-pin devices only.
TABLE 4-6: TIMER REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register xxxx
PR1 0102 Period Register 1 FFFF
T1CON 0104 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TSYNCTCS 0000
TMR2 0106 Timer2 Register xxxx
TMR3HLD 0108 Timer3 Holding Register (For 32-bit timer operations only) xxxx
TMR3 010A Timer3 Register xxxx
PR2 010C Period Register 2 FFFF
PR3 010E Period Register 3 FFFF
T2CON 0110 TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T3CON 0112 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
TMR4 0114 Timer4 Register xxxx
TMR5HLD 0116 Timer5 Holding Register (For 32-bit operations only) xxxx
TMR5 0118 Timer5 Register xxxx
PR4 011A Period Register 4 FFFF
PR5 011C Period Register 5 FFFF
T4CON 011E TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T5CON 0120 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.