Datasheet

2005-2012 Microchip Technology Inc. DS39747F-page 13
PIC24FJ128GA010 FAMILY
PMA0 30 36 44 I/O ST/TTL Parallel Master Port Address Bit 0 Input (Buffered Slave
modes) and Output (Master modes).
PMA1 29 35 43 I/O ST/TTL Parallel Master Port Address Bit 1 Input (Buffered Slave
modes) and Output (Master modes).
PMA2 8 10 14 O Parallel Master Port Address (Demultiplexed Master
modes).
PMA3 6 8 12 O
PMA4 5 7 11 O
PMA5 4 6 10 O
PMA6 16 24 29 O
PMA7 22 23 28 O
PMA8 32 40 50 O
PMA9 31 39 49 O
PMA10 28 34 42 O
PMA11 27 33 41 O
PMA12 24 30 35 O
PMA13 23 29 34 O
PMBE 51 63 78 O Parallel Master Port Byte Enable Strobe.
PMCS1 45 57 71 I/O ST/TTL Parallel Master Port Chip Select 1 Strobe/Address bit 14.
PMCS2 44 56 70 O Parallel Master Port Chip Select 2 Strobe/Address bit 15.
PMD0 60 76 93 I/O ST/TTL Parallel Master Port Data (Demultiplexed Master mode)
or Address/Data (Multiplexed Master modes).
PMD1 61 77 94 I/O ST/TTL
PMD2 62 78 98 I/O ST/TTL
PMD3 63 79 99 I/O ST/TTL
PMD4 64 80 100 I/O ST/TTL
PMD5 1 1 3 I/O ST/TTL
PMD6 2 2 4 I/O ST/TTL
PMD7 3 3 5 I/O ST/TTL
PMRD 53 67 82 I/O ST/TTL Parallel Master Port Read Strobe.
PMWR 52 66 81 I/O ST/TTL Parallel Master Port Write Strobe.
TABLE 1-2: PIC24FJ128GA010 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
64-Pin 80-Pin 100-Pin
Legend: TTL = TTL input buffer, ST = Schmitt Trigger input buffer, ANA = Analog level input/output, I
2
C™ = I
2
C/SMBus input buffer