Information

PIC24FJ128GA010 FAMILY
DS80471B-page 4  2009-2011 Microchip Technology Inc.
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2
C—56. TBF flag error with bus collisions. X X X
SPI Master mode 57. Incorrect status bit timing. X X X
RTCC Alarm 58. Pin toggling error on alarm repeat. X X
I/O Pins — 59. Spec change for V
OL and VOH.X
SPI Framed
modes
60. Framed SPIx modes are not supported. X X
SPI Enhanced
mode
61. Interrupt flag set early in Enhanced Buffer
mode under certain conditions.
XX
Core Code
Protection
62. General code protection disables
bootloader functionality.
X
UART TX Interrupt 63. A TX interrupt may occur before the data
transmission is complete.
XX
TABLE 2: SILICON ISSUE SUMMARY (CONTINUED)
Module Feature
Item
Number
Issue Summary
Affected Revisions
(1)
A2 A3 A4 C1 C2
Note 1: Only those issues indicated in the last column apply to the current silicon revision.