Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 74  2010 Microchip Technology Inc.
The page registers (DSRPAG/DSWPAG) do not
update automatically while crossing a page boundary,
when the rollover happens from 0xFFFF to 0x8000.
While developing code in assembly, care must be taken
to update the page registers when an Address Pointer
crosses the page boundary. The ‘C’ compiler keeps
track of the addressing, and increments or decrements
the page registers accordingly while accessing
contiguous data memory locations.
TABLE 4-35: EDS MEMORY ADDRESS WITH DIFFERENT PAGES AND ADDRESSES
Note 1: All write operations to EDS are executed
in a single cycle.
2: Use of Read/Modify/Write operation on
any EDS location under a REPEAT
instruction is not supported. For example,
BCLR, BSW, BTG, RLC f, RLNC f,
RRC f, RRNC f, ADD f, SUB f,
SUBR f, AND f, IOR f, XOR f,
ASR f, ASL f.
3: Use the DSRPAG register while
performing Read/Modify/Write operation.
DSRPAG
(Data Space Read Register)
DSWPAG
(Data Space Write
Register)
Source/Destination
Address while
Indirect Addressing
24-Bit EA
Pointing to
EDS
Comment
x
(1)
x
(1)
0x0000 to 0x1FFF 0x000000 to
0x001FFF
Near data
space
(2)
0x2000 to 0x7FFF 0x002000 to
0x007FFF
0x001 0x001
0x8000 to 0xFFFF
0x008000 to
0x00FFFE
32 Kbytes on
each page
0x002 0x002 0x010000 to
0x017FFE
0x003 0x003 0x018000 to
0x0187FE
Only 2 Kbytes
of extended
SRAM on this
page
0x004 0x004 0x018800 to
0x027FFE
EPMP
memory
space
(4)
•
•
•
•
•
•
•
•
•
0x1FF 0x1FF 0xFF8000 to
0xFFFFFE
0x000 0x000 Invalid Address Address error
trap
(3)
Note 1: If the source/destination address is below 0x8000, the DSRPAG and DSWPAG registers are not considered.
2: This data space can also be accessed by Direct Addressing.
3: When the source/destination address is above 0x8000 and DSRPAG/DSWPAG is ‘0’, an address error
trap will occur.
4: EPMP memory space can start from location, 0x008000, in the parts with 24 Kbytes of data memory
(PIC24FJXXXDA1XX)