Datasheet

2010 Microchip Technology Inc. DS39969B-page 335
PIC24FJ256DA210 FAMILY
24.0 TRIPLE COMPARATOR
MODULE
The triple comparator module provides three dual input
comparators. The inputs to the comparator can be
configured to use any one of five external analog inputs
(CxINA, CxINB, CxINC, CxIND and V
REF+) and a
voltage reference input from one of the internal band
gap references or the comparator voltage reference
generator (V
BG, VBG/2, VBG/6 and CVREF).
The comparator outputs may be directly connected to
the CxOUT pins. When the respective COE equals1’,
the I/O pad logic makes the unsynchronized output of
the comparator available on the pin.
A simplified block diagram of the module in shown in
Figure 24-1. Diagrams of the possible individual
comparator configurations are shown in Figure 24-2.
Each comparator has its own control register,
CMxCON (Register 24-1), for enabling and configuring
its operation. The output and event status of all three
comparators is provided in the CMSTAT register
(Register 24-2).
FIGURE 24-1: TRIPLE COMPARATOR MODULE BLOCK DIAGRAM
Note: This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
associated “PIC24F Family Reference
Manual”.
C1
V
IN-
V
IN+
CXINB
C
XINC
C
XINA
C
XIND
CV
REF
VBG
C2
V
IN-
V
IN+
C3
V
IN-
V
IN+
COE
C1OUT
Pin
CPOL
Trigger/Interrupt
Logic
CEVT
EVPOL<1:0>
COUT
Input
Select
Logic
CCH<1:0>
CREF
COE
C2OUT
Pin
CPOL
Trigger/Interrupt
Logic
CEVT
EVPOL<1:0>
COUT
COE
C3OUT
Pin
CPOL
Trigger/Interrupt
Logic
CEVT
EVPOL<1:0>
COUT
VBG/2
VBG/6
VREF+
-
CVREFM<1:0>
(1)
VREF+
CVREFP
(1)
+
01
00
10
11
01
00
10
11
1
0
0
1
Note 1: Refer Register 25-1 for bit details.