Datasheet

 2010 Microchip Technology Inc. DS39969B-page 323
PIC24FJ256DA210 FAMILY
REGISTER 22-32: G1DBEN: DATA I/O PAD ENABLE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
GDBEN15 GDBEN14 GDBEN13 GDBEN12 GDBEN11 GDBEN10 GDBEN9 GDBEN8
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
GDBEN7 GDBEN6 GDBEN5 GDBEN4 GDBEN3 GDBEN2 GDBEN1 GDBEN0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 GDBEN<15:0>: Display Data Pads Output Enable bits
1 = Corresponding display data (GD<x>) pin is enabled
0 = Corresponding display data (GD<x>) pin is disabled
GDBEN<15:0> can be used to disable or enable specific data signals while the DPPINOE bit
(G1CON3<9>) is set.
DPPINOE
GDBENx
(where x = 0 to 15)
11Display data signal (GD) associated with GDBENx is enabled.
10Display data signal (GD) associated with GDBENx is disabled.
0xDisplay data signal (GD) associated with GDBENx is disabled.