Datasheet

 2010 Microchip Technology Inc. DS39969B-page 311
PIC24FJ256DA210 FAMILY
REGISTER 22-7: G1IE: GFX INTERRUPT ENABLE REGISTER
R/W-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
PUIE — — — — — — —
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IPUIE RCCIE CHRIE VMRGNIE HMRGNIE CMDLVIE CMDFULIE CMDMPTIE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PUIE: Processing Units Complete Interrupt Enable bit
1 = Enables the PU complete interrupt
0 = Disables the PU complete interrupt
bit 14-8 Unimplemented: Read as ‘0’
bit 7 IPUIE: Inflate Processing Unit Complete Interrupt Enable bit
1 = Enables the IPU complete interrupt
0 = Disables the IPU complete interrupt
bit 6 RCCIE: Rectangle Copy Graphics Processing Unit Complete Interrupt bit
1 = Enables the RCCGPU complete interrupt
0 = Disables the RCCGPU complete interrupt
bit 5 CHRIE: Character Graphics Processing Unit Busy Interrupt bit
1 = Enables the CHRGPU busy interrupt
0 = Disables the CHRGPU busy interrupt
bit 4 VMRGNIE: Vertical Blanking Interrupt Enable bit
1 = Enables the vertical blanking period interrupt
0 = Disables the vertical blanking period interrupt
bit 3 HMRGNIE: Horizontal Blanking Interrupt Enable bit
1 = Enables the horizontal blanking period interrupt
0 = Disables the horizontal blanking period interrupt
bit 2 CMDLVIE: Command Watermark Interrupt Enable bit
1 = Enables the command watermark interrupt bit
0 = Disables the command watermark interrupt bit
bit 1 CMDFULIE: Command FIFO Full Interrupt Enable bit
1 = Enables the command FIFO full interrupt
0 = Disables the command FIFO full interrupt
bit 0 CMDMPTIE: Command FIFO Empty Interrupt Enable bit
1 = Enables the command FIFO empty interrupt
0 = Disables the command FIFO empty interrupt