Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 28  2010 Microchip Technology Inc.
RD0 46 72 D9 I/O ST
PORTD Digital I/O.
RD1 49 76 A11 I/O ST
RD2 50 77 A10 I/O ST
RD3 51 78 B9 I/O ST
RD4 52 81 C8 I/O ST
RD5 53 82 B8 I/O ST
RD6 54 83 D7 I/O ST
RD7 55 84 C7 I/O ST
RD8 42 68 E9 I/O ST
RD9 43 69 E10 I/O ST
RD10 44 70 D11 I/O ST
RD11 45 71 C11 I/O ST
RD12 — 79 A9 I/O ST
RD13 — 80 D8 I/O ST
RD14 — 47 L9 I/O ST
RD15 — 48 K9 I/O ST
RE0 60 93 A4 I/O ST
PORTE Digital I/O.
RE1 61 94 B4 I/O ST
RE2 62 98 B3 I/O ST
RE3 63 99 A2 I/O ST
RE4 64 100 A1 I/O ST
RE5 1 3 D3 I/O ST
RE6 2 4 C1 I/O ST
RE7 3 5 D2 I/O ST
RE8 — 18 G1 I/O ST
RE9 — 19 G2 I/O ST
REFO 30 44 L8 O — Reference Clock Output.
RF0 58 87 B6 I/O ST
PORTF Digital I/O.
RF1 59 88 A6 I/O ST
RF2 — 52 K11 I/O ST
RF3 33 51 K10 I/O ST
RF4 31 49 L10 I/O ST
RF5 32 50 L11 I/O ST
RF7 34 54 H8 I/O ST
RF8 — 53 J10 I/O ST
RF12 — 40 K6 I/O ST
RF13 — 39 L6 I/O ST
TABLE 1-3: PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
64-Pin
TQFP/QFN
100-Pin
TQFP
121-Pin
BGA
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C™ = I
2
C/SMBus input buffer
Note 1: The alternate EPMP pins are selected when the ALTPMP
(CW3<12>) bit is programmed to ‘0’.
2: The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
3: The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
4: The alternate V
REF pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.