Datasheet

2010 Microchip Technology Inc. DS39969B-page 263
PIC24FJ256DA210 FAMILY
REGISTER 18-13: U1CNFG2: USB CONFIGURATION REGISTER 2
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
UVCMPSEL
PUVBUS EXTI2CEN
UVBUSDIS
(1)
UVCMPDIS
(1)
UTRDIS
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-6 Unimplemented: Read as ‘0
bit 5 UVCMPSEL: V
BUS Comparator External Interface Selection bit
1 =Use V
BUSVLD, SESSVLD and SESSEND as comparator interface pins
0 =Use V
CMPST1 and VCMPST2 as comparator interface pins
bit 4 PUVBUS: V
BUS Pull-Up Enable bit
1 = Pull-up on V
BUS pin is enabled
0 = Pull-up on V
BUS pin is disabled
bit 3 EXTI2CEN: I
2
C™ Interface For External Module Control Enable bit
1 = External module(s) is controlled via the I
2
C™ interface
0 = External module(s) controlled via the dedicated pins
bit 2 UVBUSDIS: On-Chip 5V Boost Regulator Builder Disable bit
(1)
1 = On-chip boost regulator builder is disabled; digital output control interface is enabled
0 = On-chip boost regulator builder is active
bit 1 UVCMPDIS: On-Chip V
BUS Comparator Disable bit
(1)
1 = On-chip charge VBUS comparator is disabled; digital input status interface is enabled
0 = On-chip charge V
BUS comparator is active
bit 0 UTRDIS: On-Chip Transceiver Disable bit
(1)
1 = On-chip transceiver is disabled; digital transceiver interface is enabled
0 = On-chip transceiver is active
Note 1: Never change these bits while the USBPWR bit is set (U1PWRC<0> = 1).