Datasheet

 2010 Microchip Technology Inc. DS39969B-page 257

PIC24FJ256DA210 FAMILY

U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0

— — — — — — — —

bit 15 bit 8

R/W-0, HS U-0 U-0 R/W-0 U-0 U-0 R/W-0, HC R/W-0

UACTPND

— —

USLPGRD

— —

USUSPND USBPWR

bit 7 bit 0

Legend: HS = Hardware Settable bit HC = Hardware Clearable bit

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 15-8 Unimplemented: Read as ‘0’

bit 7 UACTPND: USB Activity Pending bit

1 = Module should not be suspended at the moment (requires the USLPGRD bit to be set)

0 = Module may be suspended or powered down

bit 6-5 Unimplemented: Read as ‘0’

bit 4 USLPGRD: Sleep/Suspend Guard bit

1 = Indicate to the USB module that it is about to be suspended or powered down

0 = No suspend

bit 3-2 Unimplemented: Read as ‘0’

bit 1 USUSPND: USB Suspend Mode Enable bit

1 = USB OTG module is in Suspend mode; USB clock is gated and the transceiver is placed in a

low-power state

0 = Normal USB OTG operation

bit 0 USBPWR: USB Operation Enable bit

1 = USB OTG module is enabled

0 = USB OTG module is disabled

(1)

Note 1: Do not clear this bit unless the HOSTEN, USBEN and OTGEN bits (U1CON<3,0> and U1OTGCON<2>)

are all cleared.