Datasheet

 2010 Microchip Technology Inc. DS39969B-page 229

PIC24FJ256DA210 FAMILY

bit 4 P: Stop bit

1 = Indicates that a Stop bit has been detected last

0 = Stop bit was not detected last

Hardware is set or clear when Start, Repeated Start or Stop is detected.

bit 3 S: Start bit

1 = Indicates that a Start (or Repeated Start) bit has been detected last

0 = Start bit was not detected last

Hardware is set or clear when Start, Repeated Start or Stop is detected.

bit 2 R/W

: Read/Write Information bit (when operating as I

C slave)

1 = Read – indicates data transfer is output from slave

0 = Write – indicates data transfer is input to slave

Hardware is set or clear after the reception of an I

C device address byte.

bit 1 RBF: Receive Buffer Full Status bit

1 = Receive is complete, I2CxRCV is full

0 = Receive not complete, I2CxRCV is empty

Hardware is set when I2CxRCV is written with the received byte; hardware is clear when the software

reads I2CxRCV.

bit 0 TBF: Transmit Buffer Full Status bit

1 = Transmit is in progress, I2CxTRN is full

0 = Transmit is complete, I2CxTRN is empty

Hardware is set when software writes to I2CxTRN; hardware is clear at the completion of data transmission.