Datasheet

 2010 Microchip Technology Inc. DS39969B-page 21
PIC24FJ256DA210 FAMILY
TABLE 1-3: PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS
Function
Pin Number
I/O
Input
Buffer
Description
64-Pin
TQFP/QFN
100-Pin
TQFP
121-Pin
BGA
AN0 16 25 K2 I ANA
A/D Analog Inputs.
AN1 15 24 K1 I ANA
AN2 14 23 J2 I ANA
AN3 13 22 J1 I ANA
AN4 12 21 H2 I ANA
AN5 11 20 H1 I ANA
AN6 17 26 L1 I ANA
AN7 18 27 J3 I ANA
AN8 21 32 K4 I ANA
AN9 22 33 L4 I ANA
AN10 23 34 L5 I ANA
AN11 24 35 J5 I ANA
AN12 27 41 J7 I ANA
AN13 28 42 L7 I ANA
AN14 29 43 K7 I ANA
AN15 30 44 L8 I ANA
AN16 — 9 E1 I ANA
AN17 — 10 E3 I ANA
AN18 — 11 F4 I ANA
AN19 — 12 F2 I ANA
AN20 — 14 F3 I ANA
AN21 — 19 G2 I ANA
AN22 — 92 B5 I ANA
AN23 — 91 C5 I ANA
AV
DD 19 30 J4 P — Positive Supply for Analog modules.
AV
SS 20 31 L3 P — Ground Reference for Analog modules.
C1INA 11 20 H1 I ANA Comparator 1 Input A.
C1INB 12 21 H2 I ANA Comparator 1 Input B.
C1INC 5 11 F4 I ANA Comparator 1 Input C.
C1IND 4 10 E3 I ANA Comparator 1 Input D.
C2INA 13 22 J1 I ANA Comparator 2 Input A.
C2INB 14 23 J2 I ANA Comparator 2 Input B.
C2INC 8 14 F3 I ANA Comparator 2 Input C.
C2IND 6 12 F2 I ANA Comparator 2 Input D.
C3INA 55 84 C7 I ANA Comparator 3 Input A.
C3INB 54 83 D7 I ANA Comparator 3 Input B.
C3INC 48 74 B11 I ANA Comparator 3 Input C.
C3IND 47 73 C10 I ANA Comparator 3 Input D.
CLKI 39 63 F9 I ST Main Clock Input Connection.
CLKO 40 64 F11 O — System Clock Output.
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C™ = I
2
C/SMBus input buffer
Note 1: The alternate EPMP pins are selected when the ALTPMP
(CW3<12>) bit is programmed to ‘0’.
2: The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
3: The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
4: The alternate V
REF pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.