Datasheet
2010 Microchip Technology Inc. DS39969B-page 205
PIC24FJ256DA210 FAMILY
14.3.2 PWM DUTY CYCLE
The PWM duty cycle is specified by writing to the
OCxRS and OCxR registers. The OCxRS and OCxR
registers can be written to at any time, but the duty
cycle value is not latched until a match between PRy
and TMRy occurs (i.e., the period is complete). This
provides a double buffer for the PWM duty cycle and is
essential for glitchless PWM operation.
Some important boundary parameters of the PWM duty
cycle include:
• If OCxR, OCxRS, and PRy are all loaded with
0000h, the OCx pin will remain low (0% duty
cycle).
• If OCxRS is greater than PRy, the pin will remain
high (100% duty cycle).
See Example 14-1 for PWM mode timing details.
Table 14-1 and Table 14-2 show example PWM
frequencies and resolutions for a device operating at
4 MIPS and 10 MIPS, respectively.
EQUATION 14-2: CALCULATION FOR MAXIMUM PWM RESOLUTION
(1)
EXAMPLE 14-1: PWM PERIOD AND DUTY CYCLE CALCULATIONS
(1)
Note 1: Based on FCY = FOSC/2; Doze mode and PLL are disabled.
Maximum PWM Resolution (bits) =
log
10
log
10
(2)
FPWM • (Timer Prescale Value)
bits
F
CY
()
1. Find the Timer Period register value for a desired PWM frequency of 52.08 kHz, where FOSC = 8 MHz with PLL
(32 MHz device clock rate) and a Timer2 prescaler setting of 1:1.
TCY = 2 * TOSC = 62.5 ns
PWM Period = 1/PWM Frequency = 1/52.08 kHz = 19.2 ms
PWM Period = (PR2 + 1) • T
CY • (Timer2 Prescale Value)
19.2 ms = PR2 + 1) • 62.5 ns • 1
PR2 = 306
2. Find the maximum resolution of the duty cycle that can be used with a 52.08 kHz frequency and a 32 MHz device
clock rate:
PWM Resolution = log
10
(FCY/FPWM)/log
10
2) bits
= (log
10
(16 MHz/52.08 kHz)/log
10
2) bits
= 8.3 bits
Note 1: Based on T
CY = 2 * TOSC; Doze mode and PLL are disabled.
TABLE 14-1: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 4 MIPS (FCY = 4 MHz)
(1)
PWM Frequency 7.6 Hz 61 Hz 122 Hz 977 Hz 3.9 kHz 31.3 kHz 125 kHz
Timer Prescaler Ratio 8111111
Period Register Value FFFFh FFFFh 7FFFh 0FFFh 03FFh 007Fh 001Fh
Resolution (bits) 16 16 15 12 10 7 5
Note 1: Based on FCY = FOSC/2; Doze mode and PLL are disabled.
TABLE 14-2: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 16 MIPS (FCY = 16 MHz)
(1)
PWM Frequency 30.5 Hz 244 Hz 488 Hz 3.9 kHz 15.6 kHz 125 kHz 500 kHz
Timer Prescaler Ratio 8111111
Period Register Value FFFFh FFFFh 7FFFh 0FFFh 03FFh 007Fh 001Fh
Resolution (bits) 16 16 15 12 10 7 5
Note 1: Based on F
CY = FOSC/2; Doze mode and PLL are disabled.