Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 18 2010 Microchip Technology Inc.
TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJ256DA210 FAMILY: 64-PIN
Features PIC24FJ128DA106 PIC24FJ256DA106 PIC24FJ128DA206 PIC24FJ256DA206
Operating Frequency DC – 32 MHz
Program Memory (bytes) 128K 256K 128K 256K
Program Memory (instructions) 44,032 87,552 44,032 87,552
Data Memory (bytes) 24K 96K
Interrupt Sources (soft vectors/
NMI traps)
65 (61/4)
I/O Ports Ports B, C, D, E, F, G
Total I/O Pins 52
Remappable Pins 29 (28 I/O, 1 Input only)
Timers:
Total Number (16-bit) 5
(1)
32-Bit (from paired 16-bit timers) 2
Input Capture Channels 9
(1)
Output Compare/PWM Channels 9
(1)
Input Change Notification Interrupt 52
Serial Communications:
UART 4
(1)
SPI (3-wire/4-wire) 3
(1)
I
2
C™ 3
Parallel Communications
(EPMP/PSP)
No
JTAG Boundary Scan Yes
10-Bit Analog-to-Digital Converter
(ADC) Module (input channels)
16
Analog Comparators 3
CTMU Interface Yes
USB OTG Yes
Graphics Controller Yes
Resets (and Delays) POR, BOR, RESET Instruction, MCLR
, WDT; Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set 76 Base Instructions, Multiple Addressing Mode Variations
Packages 64-Pin TQFP and QFN
Note 1: Peripherals are accessible through remappable pins.