Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 158  2010 Microchip Technology Inc.
10.1.1 I/O PORT WRITE/READ TIMING
One instruction cycle is required between a port direction
change or port write operation and a read operation of
the same port. Typically, this instruction would be a NOP.
10.1.2 OPEN-DRAIN CONFIGURATION
In addition to the PORT, LAT and TRIS registers for data
control, each port pin can also be individually configured
for either a digital or open-drain output. This is controlled
by the Open-Drain Control register, ODCx, associated
with each port. Setting any of the bits configures the
corresponding pin to act as an open-drain output.
The open-drain feature allows the generation of
outputs higher than V
DD (e.g., 5V) on any desired
digital only pins by using external pull-up resistors. The
maximum open-drain voltage allowed is the same as
the maximum V
IH specification.
10.1.3 CONFIGURING D+ AND D- PINS
(RG2 AND RG3)
The input buffers of the RG2 and RG3 pins are by
default, tri-stated. To use these pins as input pins, the
UTRDIS bit (U1CNFG2<0>) should be set which
enables the input buffers on these pins.
10.2 Configuring Analog Port Pins
(ANSEL)
The ANSx and TRISx registers control the operation of
the pins with analog function. Each port pin with analog
function is associated with one of the ANS bits (see
Register 10-1 through Register 10-7), which decides if
the pin function should be analog or digital. Refer to
Table 10-1 for detailed behavior of the pin for different
ANSx and TRISx bit settings.
When reading the PORT register, all pins configured as
analog input channels will read as cleared (a low level).
10.2.1 ANALOG INPUT PINS AND
VOLTAGE CONSIDERATIONS
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages of up
to 5.5V, a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind can
only tolerate voltages up to V
DD. Voltage excursions
beyond V
DD on these pins should always be avoided.
Table 10-2 summarizes the input capabilities. Refer to
Section 30.1 “DC Characteristics” for more details.
TABLE 10-1: CONFIGURING ANALOG/DIGITAL FUNCTION OF AN I/O PIN
Pin Function ANSx Setting TRISx Setting Comments
Analog Input 11It is recommended to keep ANSx = 1.
Analog Output 11It is recommended to keep ANSx = 1.
Digital Input 01Firmware must wait at least one instruction cycle
after configuring a pin as a digital input before a valid
input value can be read.
Digital Output 00Make sure to disable the analog output function on
the pin if any is present.
TABLE 10-2: INPUT VOLTAGE LEVELS FOR PORT OR PIN TOLERATED DESCRIPTION INPUT
Port or Pin Tolerated Input Description
PORTA
(1)
<10:9, 7:6>
V
DD Only VDD input levels are tolerated.
PORTB<15:0>
PORTC
(1)
<15:12, 4>
PORTD<7:6>
PORTE
(1)
<9>
PORTF<0>
PORTG<9:6, 3:2>
PORTA
(1)
<15:14, 5:0>
5.5V
Tolerates input levels above V
DD, useful
for most standard logic.
PORTC
(1)
<3:1>
PORTD
(1)
<15:8, 5:0>
PORTE
(1)
<8:0>
PORTF
(1)
<13:12, 8:7, 5:1>
PORTG
(1)
<15:12, 1:0>
Note 1: Not all of the pins of these PORTS are implemented in 64-pin devices (PIC24FJXXXDAX06); refer to the
device pinout diagrams for the details.