Datasheet

PIC24FJ256DA210 FAMILY
DS39969B-page 12 2010 Microchip Technology Inc.
J9 N/C L1 PGEC2/AN6/RP6/CN24/RB6
J10 RP15/GD9/CN74/RF8 L2 V
REF-
(1)
/PMA7/CN41/RA9
J11 D-/CN84/RG3 L3 AVSS
K1 PGEC1/AN1/V
REF-
(1)
/RP1/CN3/RB1 L4 AN9/RP9/GD13/CN27/RB9
K2 PGED1/AN0/V
REF+
(1)
/RP0/CN2/RB0 L5 AN10/CVREF/PMA13/CN28/RB10
K3 V
REF+
(1)
/PMA6/CN42/RA10 L6 RP31/GD2/CN76/RF13
K4 AN8/RP8/GD12/CN26/RB8 L7 AN13/PMA10/CTEDG1/CN31/RB13
K5 N/C L8 AN15/REFO/RP29/PMA0/CN12/RB15
K6 RPI32/PMA18/PMA5
(2)
/CN75/RF12 L9 RPI43/GD14/CN20/RD14
K7 AN14/CTPLS/RP14/PMA1/CN32/RB14 L10 RP10/PMA9/CN17/RF4
K8 V
DD L11 RP17/GD5/PMA8/SCL2/CN18/RF5
K9 RP5/GD15/CN21/RD15
K10 RP16/USBID/CN71/RF3
K11 RP30/GD3/CN70/RF2
TABLE 3: COMPLETE PIN FUNCTION DESCRIPTIONS FOR 121-PIN (BGA) DEVICES
PinFunctionPinFunction
Legend: RPn and RPIn represent remappable pins for Peripheral Pin Select functions.
Note 1: Alternate pin assignments for V
REF+ and VREF- when the ALTVREF Configuration bit is programmed.
2: Alternate pin assignments for EPMP when the ALTPMP
Configuration bit is programmed.
3: Pin assignment for PMCSx when CSF<1:0> is not equal to 00’.