Datasheet

 2011-2013 Microchip Technology Inc. DS39995D-page 54
PIC24FV32KA304 FAMILY
In a similar fashion, two table instructions, TBLWTH
and TBLWTL, are used to write individual bytes or
words to a program space address. The details of
their operation are explained in Section 5.0 “Flash
Program Memory”.
For all table operations, the area of program memory
space to be accessed is determined by the Table
Memory Page Address register (TBLPAG). TBLPAG
covers the entire program memory space of the
device, including user and configuration spaces. When
TBLPAG<7> = 0, the table page is located in the user
memory space. When TBLPAG<7> = 1, the page is
located in configuration space.
FIGURE 4-6: ACCESSING PROGRAM MEMORY WITH TABLE INSTRUCTIONS
Note: Only Table Read operations will execute
in the configuration memory space, and
only then, in implemented areas, such as
the Device ID. Table write operations are
not allowed.
081623
00000000
00000000
00000000
00000000
‘Phantom’ Byte
TBLRDH.B (Wn<0> = 0)
TBLRDL.W
TBLRDL.B (Wn<0> = 1)
TBLRDL.B (Wn<0> = 0)
23 15 0
TBLPAG
00
000000h
800000h
002BFEh
Program Space
Data EA<15:0>
The address for the table operation is determined by the data EA
within the page defined by the TBLPAG register. Only read
operations are provided; write operations are also valid in the
user memory area.