Datasheet

2011-2013 Microchip Technology Inc. DS39995D-page 50
PIC24FV32KA304 FAMILY
TABLE 4-24: NVM REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
(1)
NVMCON 0760 WR WREN WRERR PGMONLY ERASE NVMOP5 NVMOP4 NVMOP3 NVMOP2 NVMOP1 NVMOP0 0000
NVMKEY 0766
—NVMKEY0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: Reset value shown is for POR only. The value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
TABLE 4-25: ULTRA LOW-POWER WAKE-UP REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
ULPWCON 0768 ULPEN
—ULPSIDL ULPSINK 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-26: PMD REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
PMD1 0770 T5MD T4MD T3MD T2MD T1MD
I2C1MD U2MD U1MD SPI2MD SPI1MD ADC1MD 0000
PMD2 0772
IC3MD IC2MD IC1MD OC3MD OC2MD OC1MD 0000
PMD3 0774
CMPMD RTCCMD CRCPMD —I2C2MD 0000
PMD4 0776
—ULPWUMD EEMD REFOMD CTMUMD HLVDMD 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.