Datasheet

2011-2013 Microchip Technology Inc. DS39995D-page 44
PIC24FV32KA304 FAMILY
TABLE 4-9: I2Cx REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
I2C1RCV 0200
I2CRCV 0000
I2C1TRN 0202
—I2CTRN00FF
I2C1BRG 0204
—I2CBRG0000
I2C1CON 0206 I2CEN
I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN 1000
I2C1STAT 0208 ACKSTAT TRSTAT
BCL GCSTAT ADD10 IWCOL I2COV D/A PSR/WRBF TBF 0000
I2C1ADD 020A
—I2CADD0000
I2C1MSK 020C
AMSK9 AMSK8 AMSK7 AMSK6 AMSK5 AMSK4 AMSK3 AMSK2 AMSK1 AMSK0 0000
I2C2RCV 0210
I2CRCV 0000
I2C2TRN 0212
—I2CTRN00FF
I2C2BRG 0214
—I2CBRG0000
I2C2CON 0216 I2CEN
I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN 1000
I2C2STAT 0218 ACKSTAT TRSTAT
BCL GCSTAT ADD10 IWCOL I2COV D/A PSR/WRBF TBF 0000
I2C2ADD 021A
—I2CADD0000
I2C2MSK 021C
AMSK9 AMSK8 AMSK7 AMSK6 AMSK5 AMSK4 AMSK3 AMSK2 AMSK1 AMSK0 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-10: UARTx REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
U1MODE 0220 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD RXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U1STA 0222 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U1TXREG 0224
—U1TXREGxxxx
U1RXREG 0226
—U1RXREG0000
U1BRG 0228 BRG 0000
U2MODE 0230 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD RXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U2STA 0232 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U2TXREG 0234
—U2TXREGxxxx
U2RXREG 0236
—U2RXREG0000
U2BRG 0238 BRG 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.