Datasheet

PIC24FV32KA304 FAMILY
DS39995D-page 288  2011-2013 Microchip Technology Inc.
FIGURE 29-16: UARTx BAUD RATE GENERATOR OUTPUT TIMING
FIGURE 29-17: UARTx START BIT EDGE DETECTION
TABLE 29-35: UARTx TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T
A  +85°C (Industrial)
-40°C  T
A  +125°C (Extended)
Symbol Characteristics Min Typ Max Units
T
LW UxBCLK High Time 20 TCY/2 — ns
T
HW UxBCLK Low Time 20 (TCY * UXBRG) + TCY/2 — ns
T
BLD UxBCLK Falling Edge Delay from UxTX -50 — 50 ns
T
BHD UxBCLK Rising Edge Delay from UxTX TCY/2 – 50 — TCY/2 + 50 ns
T
WAK Minimum Low on UxRX Line to Cause
Wake-up
—1 —s
T
CTS Minimum Low on UxCTS Line to Start
Transmission
Tcy — — n s
T
SETUP Start bit Falling Edge to System Clock Rising
Edge Setup Time
3— —ns
T
STDELAY Maximum Delay in the Detection of the
Start bit Falling Edge
——TCY + TSETUP ns
UxBCLK
UxTX
T
BLD
TBHD
UxBRG + 1 * TCY TLW THW
UxBRG
Cycle
Clock
UxRX
Any Value
T
STDELAY
TSETUP
TCY
Start bit Detected, UxBRG Started