Datasheet

 2011-2013 Microchip Technology Inc. DS39995D-page 243
PIC24FV32KA304 FAMILY
REGISTER 26-6: FPOR: RESET CONFIGURATION REGISTER
R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1
MCLRE
(2)
BORV1
(3)
BORV0
(3)
I2C1SEL
(1)
PWRTEN RETCFG
(1)
BOREN1 BOREN0
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 MCLRE: MCLR
Pin Enable bit
(2)
1 = MCLR pin is enabled; RA5 input pin is disabled
0 = RA5 input pin is enabled; MCLR
is disabled
bit 6-5 BORV<1:0>: Brown-out Reset Enable bits
(3)
11 = Brown-out Reset is set to the lowest voltage
10 = Brown-out Reset
01 = Brown-out Reset is set to the highest voltage
00 = Downside protection on POR is enabled – “zero power” is selected
bit 4 I2C1SEL: Alternate I2C1 Pin Mapping bit
(1)
1 = Default location for SCL1/SDA1 pins
0 = Alternate location for SCL1/SDA1 pins
bit 3 PWRTEN: Power-up Timer Enable bit
1 = PWRT is enabled
0 = PWRT is disabled
bit 2 RETCFG: Retention Regulator Configuration bit
(1)
1 = Retention Regulator is not available
0 = Retention Regulator is available and controlled by the RETEN bit (RCON<12>) during Sleep
bit 1-0 BOREN<1:0>: Brown-out Reset Enable bits
11 = Brown-out Reset is enabled in hardware; SBOREN bit is disabled
10 = Brown-out Reset is enabled only while device is active and disabled in Sleep; SBOREN bit is disabled
01 = Brown-out Reset is controlled with the SBOREN bit setting
00 = Brown-out Reset is disabled in hardware; SBOREN bit is disabled
Note 1: This setting only applies to the “FV” devices. This bit is reserved and should be maintained as ‘1’ on “F”
devices.
2: The MCLRE fuse can only be changed when using the V
PP-based ICSP™ mode entry. This prevents a
user from accidentally locking out the device from the low-voltage test entry.
3: Refer to Section 29.0 “Electrical Characteristics” for BOR voltages.