Datasheet

2011-2013 Microchip Technology Inc. DS39995D-page 213
PIC24FV32KA304 FAMILY
bit 0 ALTS: Alternate Input Sample Mode Select bit
1 = Uses channel input selects for Sample A on the first sample and Sample B on the next sample
0 = Always uses channel input selects for Sample A
REGISTER 22-2: AD1CON2: A/D CONTROL REGISTER 2 (CONTINUED)
Note 1: This is only applicable when the buffer is used in FIFO mode (BUFREGEN = 0). In addition, BUFS is only
used when BUFM = 1.
2: The voltage reference setting will not be within the specification with V
DD below 4.5V.
3: The voltage reference setting will not be within the specification with V
DD below 2.3V.
REGISTER 22-3: AD1CON3: A/D CONTROL REGISTER 3
R/W-0 R-0 r-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADRC EXTSAM
r SAMC4 SAMC3 SAMC2 SAMC1 SAMC0
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADCS7 ADCS6 ADCS5 ADCS4 ADCS3 ADCS2 ADCS1 ADCS0
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 ADRC: A/D Conversion Clock Source bit
1 = RC clock
0 = Clock is derived from the system clock
bit 14 EXTSAM: Extended Sampling Time bit
1 = A/D is still sampling after SAMP = 0
0 = A/D is finished sampling
bit 13 Reserved: Maintain as ‘0
bit 12-8 SAMC<4:0>: Auto-Sample Time Select bits
11111 = 31 T
AD
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00001 =1 TAD
00000 =0 TAD
bit 7-0 ADCS<7:0>: A/D Conversion Clock Select bits
11111111-01000000 = Reserved
00111111 = 64·T
CY =TAD
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00000001 = 2·TCY =TAD
00000000 = TCY =TAD