Datasheet

PIC24FV32KA304 FAMILY
DS39995D-page 176  2011-2013 Microchip Technology Inc.
REGISTER 17-3: I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
— — — — — — AMSK9 AMSK8
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AMSK7 AMSK6 AMSK5 AMSK4 AMSK3 AMSK2 AMSK1 AMSK0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-10 Unimplemented: Read as ‘0’
bit 9-0 AMSK<9:0>: Mask for Address Bit x Select bits
1 = Enables masking for bit x of an incoming message address; bit match is not required in this position
0 = Disables masking for bit x; bit match is required in this position
REGISTER 17-4: PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0
— — SMBUSDEL2 SMBUSDEL1 — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-6 Unimplemented: Read as ‘0’
bit 5 SMBUSDEL2: SMBus SDA2 Input Delay Select bit
1 = The I2C2 module is configured for a longer SMBus input delay (nominal 300 ns delay)
0 = The I2C2 module is configured for a legacy input delay (nominal 150 ns delay)
bit 4 SMBUSDEL1: SMBus SDA1 Input Delay Select bit
1 = The I2C1 module is configured for a longer SMBus input delay (nominal 300 ns delay)
0 = The I2C1 module is configured for a legacy input delay (nominal 150 ns delay)
bit 3-0 Unimplemented: Read as ‘0’