Datasheet

PIC24FV32KA304 FAMILY
DS39995D-page 158  2011-2013 Microchip Technology Inc.
bit 2-0 OCM<2:0>: Output Compare x Mode Select bits
(1)
111 = Center-Aligned PWM mode on OCx
110 = Edge-Aligned PWM mode on OCx
101 = Double Compare Continuous Pulse mode: Initialize OCx pin low; toggle OCx state continuously
on alternate matches of OCxR and OCxRS
100 = Double Compare Single-Shot mode: Initialize OCx pin low; toggle OCx state on matches of
OCxR and OCxRS for one cycle
011 = Single Compare Continuous Pulse mode: Compare events continuously toggle the OCx pin
010 = Single Compare Single-Shot mode: Initialize OCx pin high; compare event forces the OCx pin low
001 = Single Compare Single-Shot mode: Initialize OCx pin low, compare event forces the OCx pin high
000 = Output compare channel is disabled
REGISTER 15-1: OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1 (CONTINUED)
Note 1: The comparator module used for Fault input varies with the OCx module. OC1 and OC2 use
Comparator 1; OC3 and OC4 use Comparator 2; OC5 uses Comparator 3.