Datasheet

 2008-2011 Microchip Technology Inc. DS39927C-page 243
PIC24F16KA102 FAMILY
TABLE 29-32: I
2
C™ BUS DATA TIMING REQUIREMENTS (SLAVE MODE)
FIGURE 29-13: START BIT EDGE DETECTION
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T
A  +85°C (Industrial)
-40°C  T
A  +125°C for Extended
Param
No.
Symbol Characteristic Min Max Units Conditions
IS10 T
LO:SCL Clock Low Time 100 kHz mode 4.7 — s Device must operate at a
minimum of 1.5 MHz
400 kHz mode 1.3 — s Device must operate at a
minimum of 10 MHz
1 MHz mode
(1)
0.5 — s
IS11 THI:SCL Clock High Time 100 kHz mode 4.0 — s Device must operate at a
minimum of 1.5 MHz
400 kHz mode 0.6 — s Device must operate at a
minimum of 10 MHz
1 MHz mode
(1)
0.5 — s
IS20 T
F:SCL SDAx and SCLx
Fall Time
100 kHz mode — 300 ns CB is specified to be from
10 to 400 pF
400 kHz mode 20 + 0.1 CB 300 ns
1 MHz mode
(1)
— 100 ns
IS21 T
R:SCL SDAx and SCLx
Rise Time
100 kHz mode — 1000 ns CB is specified to be from
10 to 400 pF
400 kHz mode 20 + 0.1 CB 300 ns
1 MHz mode
(1)
— 300 ns
IS25 T
SU:DAT Data Input
Setup Time
100 kHz mode 250 — ns
400 kHz mode 100 — ns
1 MHz mode
(1)
100 — ns
IS26 T
HD:DAT Data Input
Hold Time
100 kHz mode 0 — ns
400 kHz mode 0 0.9 s
1 MHz mode
(1)
00.3s
IS40 T
AA:SCL Output Valid From
Clock
100 kHz mode 0 3500 ns
400 kHz mode 0 1000 ns
1 MHz mode
(1)
0 350 ns
IS45 T
BF:SDA Bus Free Time 100 kHz mode 4.7 — s Time the bus must be free
before a new transmission
can start
400 kHz mode 1.3 — s
1 MHz mode
(1)
0.5 — s
IS50 C
B Bus Capacitive Loading — 400 pF
Note 1: Maximum pin capacitance = 10 pF for all I
2
C™ pins (for 1 MHz mode only).
BRGx
Cycle
Clock
UxRX
Any Value
T
STDELAY
TSETUP
TCY
Start bit Detected, BRGx Started