Datasheet

2008-2011 Microchip Technology Inc. DS39927C-page 185
PIC24F16KA102 FAMILY
REGISTER 23-1: CMxCON: COMPARATOR x CONTROL REGISTERS
R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R-0
CON COE CPOL CLPWR CEVT COUT
bit 15 bit 8
R/W-0 R/W-0 U-0 R/W-0 U-0 U-0 R/W-0 R/W-0
EVPOL1 EVPOL0
CREF CCH1 CCH0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
bit 14 COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
bit 13 CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
bit 12 CLPWR: Comparator Low-Power Mode Select bit
1 = Comparator operates in Low-Power mode
0 = Comparator does not operate in Low-Power mode
bit 11-10 Unimplemented: Read as0
bit 9 CEVT: Comparator Event bit
1 = Comparator event defined by EVPOL<1:0> has occurred; subsequent triggers and interrupts are
disabled until the bit is cleared
0 = Comparator event has not occurred
bit 8 COUT: Comparator Output bit
When CPOL =
0:
1 =VIN+ > VIN-
0 =V
IN+ < VIN-
When CPOL =
1:
1 =VIN+ < VIN-
0 =V
IN+ > VIN-
bit 7-6 EVPOL<1:0>: Trigger/Event/Interrupt Polarity Select bits
11 = Trigger/event/interrupt is generated on any change of the comparator output (while CEVT = 0)
10 = Trigger/event/interrupt is generated on transition of the comparator output:
If CPOL =
0 (non-inverted polarity):
High-to-low transition only.
If CPOL =
1 (inverted polarity):
Low-to-high transition only.
01 = Trigger/event/interrupt is generated on transition of the comparator output:
If CPOL =
0 (non-inverted polarity):
Low-to-high transition only.
If CPOL =
1 (inverted polarity):
High-to-low transition only.
00 = Trigger/event/interrupt generation is disabled