Datasheet

PIC24F16KL402 FAMILY
DS30001037C-page 88  2011-2013 Microchip Technology Inc.
REGISTER 8-24: IPC7: INTERRUPT PRIORITY CONTROL REGISTER 7
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— U2TXIP2
(1)
U2TXIP1
(1)
U2TXIP0
(1)
— U2RXIP2
(1)
U2RXIP1
(1)
U2RXIP0
(1)
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 U-0 U-0
— INT2IP2 INT2IP1 INT2IP0 — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 U2TXIP<2:0>: UART2 Transmitter Interrupt Priority bits
(1)
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as ‘0’
bit 10-8 U2RXIP<2:0>: UART2 Receiver Interrupt Priority bits
(1)
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 INT2IP<2:0>: External Interrupt 2 Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 3-0 Unimplemented: Read as ‘0’
Note 1: These bits are unimplemented on PIC24FXXKL10X and PIC24FXXKL20X devices.