Datasheet

 2011-2013 Microchip Technology Inc. DS30001037C-page 81
PIC24F16KL402 FAMILY
REGISTER 8-17: IPC0: INTERRUPT PRIORITY CONTROL REGISTER 0
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— T1IP2 T1IP1 T1IP0 — CCP1IP2 CCP1IP1 CCP1IP0
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — INT0IP2 INT0IP1 INT0IP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 T1IP<2:0>: Timer1 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as ‘0’
bit 10-8 CCP1IP<2:0>: Capture/Compare/PWM1 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7-3 Unimplemented: Read as ‘0’
bit 2-0 INT0IP<2:0>: External Interrupt 0 Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled