Datasheet

PIC24F16KL402 FAMILY
DS30001037C-page 78  2011-2013 Microchip Technology Inc.
REGISTER 8-12: IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
R/W-0 R/W-0 R/W-0 U-0 R/W-0 U-0 R/W-0 U-0
U2TXIE
(1)
U2RXIE
(1)
INT2IE —T4IE
(1)
— CCP3IE
(1)
—
bit 15 bit 8
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — INT1IE CNIE CMIE BCL1IE SSP1IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 U2TXIE: UART2 Transmitter Interrupt Enable bit
(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 14 U2RXIE: UART2 Receiver Interrupt Enable bit
(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 13 INT2IE: External Interrupt 2 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 12 Unimplemented: Read as ‘0’
bit 11 T4IE: Timer4 Interrupt Enable bit
(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 10 Unimplemented: Read as ‘0’
bit 9 CCP3IE: Capture/Compare/PWM3 Interrupt Enable bit
(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 8-5 Unimplemented: Read as ‘0’
bit 4 INT1IE: External Interrupt 1 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 3 CNIE: Input Change Notification Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 2 CMIE: Comparator Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 1 BCL1IE: MSSP1 I
2
C™ Bus Collision Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 0 SSP1IE: MSSP1 SPI/I
2
C Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Note 1: These bits are unimplemented on PIC24FXXKL10X and PIC24FXXKL20X devices.