Datasheet

2011-2013 Microchip Technology Inc. DS30001037C-page 75
PIC24F16KL402 FAMILY
REGISTER 8-7: IFS2: INTERRUPT FLAG STATUS REGISTER 2
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0
— T3GIF
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-6 Unimplemented: Read as0
bit 5 T3GIF: Timer3 External Gate Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 4-0 Unimplemented: Read as0
REGISTER 8-8: IFS3: INTERRUPT FLAG STATUS REGISTER 3
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 U-0
—BCL2IF
(1)
SSP2IF
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-3 Unimplemented: Read as0
bit 2 BCL2IF: MSSP2 I
2
C™ Bus Collision Interrupt Flag Status bit
(1)
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 1 SSP2IF: MSSP2 SPI/I
2
C Event Interrupt Flag Status bit
(1)
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 0 Unimplemented: Read as0
Note 1: These bits are unimplemented on PIC24FXXKL10X and PIC24FXXKL20X devices.