Datasheet

PIC24F16KL402 FAMILY
DS30001037C-page 54  2011-2013 Microchip Technology Inc.
REGISTER 6-1: NVMCON: NONVOLATILE MEMORY CONTROL REGISTER
R/SO-0, HC R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0
WR WREN WRERR PGMONLY
— — — —
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— ERASE NVMOP5
(1)
NVMOP4
(1)
NVMOP3
(1)
NVMOP2
(1)
NVMOP1
(1)
NVMOP0
(1)
bit 7 bit 0
Legend: HC = Hardware Clearable bit U = Unimplemented bit, read as ‘0’
R = Readable bit W = Writable bit SO = Settable Only bit
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 WR: Write Control bit (program or erase)
1 = Initiates a data EEPROM erase or write cycle (can be set but not cleared in software)
0 = Write cycle is complete (cleared automatically by hardware)
bit 14 WREN: Write Enable bit (erase or program)
1 = Enables an erase or program operation
0 = No operation allowed (device clears this bit on completion of the write/erase operation)
bit 13 WRERR: Flash Error Flag bit
1 = A write operation is prematurely terminated (any MCLR
or WDT Reset during programming
operation)
0 = The write operation completed successfully
bit 12 PGMONLY: Program Only Enable bit
1 = Write operation is executed without erasing target address(es) first
0 = Automatic erase-before-write; write operations are preceded automatically by an erase of target
address(es)
bit 11-7 Unimplemented: Read as ‘0’
bit 6 ERASE: Erase Operation Select bit
1 = Performs an erase operation when WR is set
0 = Performs a write operation when WR is set
bit 5-0 NVMOP<5:0>: Programming Operation Command Byte bits
(1)
Erase Operations (when ERASE bit is ‘1’):
011010 = Erases 8 words
011001 = Erases 4 words
011000 = Erases 1 word
0100xx = Erases entire data EEPROM
Programming Operations (when ERASE bit is ‘
0’):
001xxx = Writes 1 word
Note 1: These NVMOP configurations are unimplemented on PIC24F04KL10X and PIC24F08KL20X devices.