Datasheet

2011-2013 Microchip Technology Inc. DS30001037C-page 42
PIC24F16KL402 FAMILY
TABLE 4-16: SYSTEM REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
RCON 0740 TRAPR IOPUWR SBOREN
CM PMSLP EXTR SWR SWDTEN WDTO SLEEP IDLE BOR POR (Note 1)
OSCCON 0742
COSC2 COSC1 COSC0 NOSC2 NOSC1 NOSC0 CLKLOCK —LOCK CF SOSCDRV SOSCEN OSWEN (Note 2)
CLKDIV 0744 ROI DOZE2 DOZE1 DOZE0 DOZEN RCDIV2 RCDIV1 RCDIV0
3100
OSCTUN 0748
TUN5 TUN4 TUN3 TUN2 TUN1 TUN0 0000
REFOCON 074E ROEN
ROSSLP ROSEL RODIV3 RODIV2 RODIV1 RODIV0 0000
HLVDCON 0756 HLVDEN
—HLSIDL VDIR BGVST IRVST HLVDL3 HLVDL2 HLVDL 1 H LVDL0 0000
Legend: — = unimplemented, read as0’. Reset values are shown in hexadecimal.
Note 1: RCON register Reset values are dependent on the type of Reset.
2: OSCCON register Reset values are dependent on configuration fuses and by type of Reset.
TABLE 4-17: NVM REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
NVMCON 0760 WR WREN WRERR PGMONLY
ERASE NVMOP5 NVMOP4 NVMOP3 NVMOP2 NVMOP1 NVMOP0 0000
NVMKEY 0766
NVM Key Register 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-18: ULTRA LOW-POWER WAKE-UP REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
ULPWCON 0768 ULPEN
—ULPSIDL ULPSINK 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-19: PMD REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 All Resets
PMD1 0770
T4MD T3MD T2MD T1MD SSP1MD U2MD U1MD ADC1MD 0000
PMD2 0772
CCP3MD CCP2MD CCP1MD 0000
PMD3 0774
—CMPMD SSP2MD 0000
PMD4 0776
—ULPWUMD EEMD REFOMD —HLVDMD 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.